The present invention relates to a semiconductor device and a radio communication terminal mounting the semiconductor device.
Recently, in a radio communication terminal, there has been used a PLL (Phase Locked Loop) circuit for accurately locking a carrier frequency or the like.
For example, Japanese Unexamined Patent Application Publication No. 2010-34618 discloses a PLL circuit which compensates the offset (fluctuation of an oscillation frequency) occurring upon switching a loop bandwidth. The loop bandwidth means a range of frequencies which the PLL circuit can control.